Zentel A3F4GH40DBF-WC 4Gb DDR4 SDRAM
Zentel A3F4GH40DBF-WC 4Gb DDR4 SDRAM with a Pseudo Open Drain (POD) interface for data input/output operates within 0°C to 95°C case temperature range (commercial grade). This SDRAM supports Command/Address Latency (CAL), asynchronous reset, gear down mode (1/2 and 1/4 rate), programmable preamble, self-refresh abort, and Temperature Controlled Refresh (TCR) mode. The A3F4GH40DBF-WC 4Gb DDR4 SDRAM features a 3200Mbps data rate, a bi-directional differential data strobe, and a Data Mask (DM) to write data. This SDRAM complies with JEDEC JESD-79-4 standards and is available in a 96-ball FBGA package.Features
- 3200Mbps data rate (DDR4-3200)
- Bi-directional differential data strobe (DQS_t and DQS_c)
- Pseudo Open Drain (POD) interface for data input/output
- Supports Low Power Auto Self Refresh (LPASR) mode
- Command/Address Latency (CAL)
- Supports Temperature Controlled Refresh (TCR) mode
- High-speed data transfer by the 8-bit pre-fetch
- Supports hPPR and sPPR
- Supports asynchronous reset
- Data Mask (DM) for write data
- Nominal, park, and dynamic On-Die Termination (ODT)
- 8 internal banks
- Power supply:
- VDD=VDDQ=1.2V±5%
- VPP=2.5V-5%+10%
- 0°C to 95°C operating case temperature range
- Differential clock inputs operation (CK_t and CK_c)
- Refresh cycles:
- Average refresh period:
- 7.8μs at 0°C≤TC≤85°C
- 3.9μs at 85°C≤TC≤95°C
- Average refresh period:
- Multipurpose register READ and WRITE capability
- Supports write leveling and programmable preamble
- Complies with JEDEC JESD-79-4 standards
- Available in a 96-ball FBGA package
Publié le: 2024-06-18
| Mis à jour le: 2024-07-22
